1. Field of the Invention
The present invention generally relates to metal-oxide-semiconductor field-effect transistors (MOSFETs), and more specifically to a method of fabricating an N-channel MOSFET with a structure for suppressing hot-electron injection and related effects.
2. Description of the Related Art
Advances in integrated circuit technology have made possible the fabrication of MOSFETs with channel lengths of less than one-half micrometer. In order to prevent punchthrough, in which the depletion regions of the source and drain merge together to form an uncontrollable continuous channel, the doping of the substrate in the channel region is made considerably higher than in MOSFETs with longer channels. However, this produces a steep doping concentration gradient across the source/substrate and drain/substrate metallurgical junctions, which increases the electric field across the junctions.
In N-channel devices, the high electric field causes impact ionization to occur in the drain depletion region where hole-electron pairs are created by the impact of the drain current in the high field region (they hit the silicon atoms). Some of the electrons generated by impact ionization are called "hot electrons". The generated holes create the problem of "snapback" (parasitic n-p-n bipolar action) whereas the generated "hot electrons" create the problem of gate oxide charging.
Snapback occurs when the lateral parasitic n-p-n bipolar transistor (source-substrate-drain) is turned on by the large impact ionization current from the drain before the substrate-drain diode breaks down. The minimum drain voltage at which snapback occurs, known as the "snapback voltage", decreases detrimentally as the channel doping is increased and the drain/substrate electric field is correspondingly increased.
High channel doping also causes the electric field across the gate oxide to be high enough that electrons generated by impact ionization will be injected into the gate oxide and create a negative charge layer therein. Gate oxide charging, which continues to increase with time during device operation, is detrimental to the long term operation of the MOSFET. An analysis of hot electron and related short channel effects is presented in a textbook entitled "Physics of Semiconductor Devices", 2nd Edition, by S. Sze, John Wiley & Sons, 1981, pp. 480-486.
A method of reducing the electric field across the drain/substrate junction, and thereby reducing hot electron injection and related effects, is disclosed in U.S. Pat. No. 5,006,477, entitled "METHOD OF MAKING A LATCH UP FREE, HIGH VOLTAGE, CMOS BULK PROCESS FOR SUB-HALF MICRON DEVICES", issued Apr. 9, 1991 to Joseph E. Farb (the present inventor). This patent discloses an N-channel MOSFET including graded source and drain regions which are lightly doped by ion implantation and then subjected to thermal cycling to diffuse the implanted impurities. The surface portions of the source and drain regions for connection to ohmic contacts are then subjected to a heavy doping implant. The reduced dopant concentration gradient provided by the lightly and heavily doped drain regions in series reduces the electric field across the drain/substrate metallurgical junction and thereby the injection of hot electrons and related effects.